维普期刊资源整合服务平台（V6.5）

37篇 您的检索式：作者名="Jerraya"

选中清除导出查看参考文献查看引证文献引用追踪共2页首页上一页第1页下一页末页 /2 跳转

	题名	作者	年代	出处	被引量
1	Hardware/software interface codesign for embedded systems显示文摘	Jerraya A Wolf W	2005	IEEE Computer Society2005，38，2：	1
2	Hardware/software interface codesign for embedded systems显示文摘	JERRAYA A WOLF W	2005	IEEE Computer Society2005，38，2：	1
3	Multiprocessor system-on-chips显示文摘	Jerraya A Tenhunen H Wolf W	2005	IEEE Computer2005，38，7：	1
4	Introduction:muhiprocessor systems-on-chips显示文摘	Jerraya A A Tenhunen H Wolf W	2005	IEEE Computer2005，38，7：	1
5	Hardware/software cosimulation from interface perspective显示文摘	Yoo S Jerraya A A	2005	IEE Proc -Comput Digit Tech2005，152，3：	1
6	显示文摘	Jarboui S Jerraya H Moussi A	2009	Tunis Med2009，87，11：	1
7	Hardware/ Software interface codesign for embedded systems显示文摘	JERRAYA A WOLF W	2005	IEEE Computer2005，38，2：	1
8	Gradual refinement for application-specific MPSoC design from Simulink model to RTL implementation显示文摘The application-specific multiprocessor system-on-chip(MPSoC) architecture is becoming an attractive solution to deal with increasingly complex embedded applications,which require both high performance and flexible programmability. As an effective method for MPSoC development,we present a gradual refinement flow starting from a high-level Simulink model to a synthesizable and executable hardware and software specification. The proposed methodology consists of five different abstract levels:Simulink combined algorithm and architecture model(CAAM),virtual architecture(VA),transactional accurate architecture(TA),virtual prototype(VP) and field-programmable gate array(FPGA) emulation. Experimental results of Motion-JPEG and H.264 show that the proposed gradual refinement flow can generate various MPSoC architectures from an original Simulink model,allowing processor,communication and tasks design space exploration.	Kai HUANG Xiao-lang YAN Sang-il HAN Soo-ik CHAE Ahmed A. JERRAYA Katalin POPOVICI Xavier GUERIN Lisane BRISOLARA Luigi CARRO	2009	Journal of Zhejiang University-Science A(Applied Physics & Engineering)2009，10，2：	1
9	Predirtive factors of mortality in Fournier's garlgrene显示文摘	Jerraya H Fehri H Khalfallah M	2015	Tunis Med2015，93，：	1
10	Roundtable: envisioning the future for multiproeessor SoC 显示文摘	Jerraya A A Franza O Levy M	2007	IEEE Design & Test of Computers2007，24，2：	1
11	A New Case of Spontaneous Regression of Inflammatory Hepatic Pseudotumor显示文摘	Hichem Jerraya Slim Jarboui Hassen Daghmoura Abdeljelil Zaouche Elijah Dixon	2011	Case Reports in Medicine2011，，：	1
12	Guest Editors' Introduction: Multiprocessor Systems- on - Chips 显示文摘	Jerraya A Tenhunen H Wolf W	2005	Computer2005，38，7：	1
13	Multiprocessor System -on- Chip (MPSoC) Technology 显示文摘	Wolf W Jerraya A A Martin G	2008	IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems2008，27，10：	1
14	Hardware / Software Interface Codesign for Embedded Systems 显示文摘	JERRAYA AA WOLFW	2005	IEEE computer Society2005，38，2：	1
15	Hardware/ Software Interface Codesign for Embedded Systems显示文摘	JERRAYA AA WOLF W	2005	IEEE computer Society2005，38，2：	1
16	Multiprocessor system-on-chip (MPSoC) technology 显示文摘	Wolf W Jerraya A A Martin G	2008	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2008，27，1：	1
17	Colif: a design representation for application specific multiprocessor SOCs 显示文摘	Cesario W Nicolescu G Jerraya A	2001	Design and Test of Computers2001，18，5：	1
18	Multiprocessor systems-on-chips 显示文摘	Abmed Jerraya Hannu Tenbunen Wayne Wolf	2005	IEEE Computer2005，38，7：	1
19	Guest editors' introduction: multiprocessor systems-on-chips 显示文摘	Jerraya A A Tenhunen H Wolf W	2005	IEEE Computer2005，38，7：	1
20	Hardware/software interface codesign for embedded systems 显示文摘	Jerraya A and Wolf W	2005	IEEE Computer2005，38，2：	1

返回顶部每页显示：

共2页首页上一页第1页下一页末页 /2 跳转

互联网出版许可证新出网证(渝)字10号全国400电话 - 免长途话费

用户提示