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18篇 您的检索式:作者名="Lee Hanho"
    题名 作者 年代 出处 被引量
1High-speed VLSI architecture for parallel Rees- Solomon on decoder 显示文摘Lee Hanho 2003IEEE Transactions on Vary Large Scale Integration (VLSI) Systems2003,11,4:1
2Modified Euclidean algorithm block for high-speed Reed-Solomon decoder显示文摘Lee Hanho 2001Electronic letters2001,37,14:1
3High-speed VLSI architecture for parallel reed-solomon decoder 显示文摘Lee Hanho 2003IEEE Transactions on VLSI Systems2003,11,2:1
4High-Speed VLSI Architecture for Parallel Reed-Solomon Decoder 显示文摘Hanho Lee 2003IEEE Trans on Very Large Integration (VLSI) Systems2003,11,2:1
5A High-Speed Low-complexity Reed-Solomon De-coder for Optical Communications显示文摘Hanho Lee 2005IEEE Transactions onCircuits and Systems II:Express Briefs2005,52,8:1
6High speed VLSI architecture for parallel reed solomon decoder显示文摘Lee Hanho 2003IEEE Trans on VLSI System2003,11,2:1
7Performance Evaluation and Optimal Design for FPGA-Based Digit-Serial DSP Functions显示文摘Lee Hanho Sobelman Gerald E 2003Computers and Electrical Engineering2003,29,2:1
8Two-parallel Reed-Solomon based FEC architecture for optical communications显示文摘Seungbeom Lee Chang-SeoK Choi Hanho Lee 2008IEICE Electronlcs Express2008,5,1:1
9Modified Euclidean algorithm block for high-speed Reed-Solomon decoder显示文摘Lee Hanho 2001IEEE Trans Comput2001,37,14:1
10High-speed VLSI architecture for parallel Reed-Solomon decoder显示文摘Hanho Lee 2003IEEE Trans on Very Large Integration (VLSI) System2003,11,2:1
11High-speed VLSI Architecture for Parallel Reed-Solomon Decoder显示文摘Lee Hanho 2003IEEE Transactions on Very Large Scale Integration(VLSI) Systems2003,11,2:1
12FPGA-based FIR filters using digital-serial arithmetic显示文摘Hanho Lee Sobelman G E 1997Tenth Annual IEEE Internation1997,710,:1
13A Self-Recon?gurable adaptive FIR filter system on partial recon?guration platform 显示文摘Chang-Seok Choi Hanho Lee 2006Ieice Trans Inf & Syst2006,90,12:1
14High-speed VLSI architecture for parallel reed-solomon decoder显示文摘Hanho Lee 2003/EEE Transactions on VLS/ Systems2003,11,:1
15An Area - Efficient Euclidean Algorithm Block For Reed- Solomon Decoder 显示文摘Lee Hanho 2003IEEE Computer Society Annual Symposium on VLSI2003,,:1
16Performance Evaluation and Optimal design for FPGA-based Digit-serial DSP Functions显示文摘 Sobelman G E 2003Computers and Electrical Engineering2003,29,:1
17J Alloys Comp显示文摘Lee Hanho Lee Kiyoung 1996239:63~701996,239,:1
18A high-speed, low-complexity reed-solomon decoder for optical communications 显示文摘Hanho Lee 2005IEEE Transactions on Circuits and SystemII2005,52,8:1
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