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| 1 | Novel N-hit single event transient mitigation technique via open guard transistor in 65 nm bulk CMOS process显示文摘In this paper,we proposed a new n-channel MOS single event transient(SET) mitigation technique,which is called the open guard transistor(OGT) technique.This hardening scheme is compared with several classical n-channel MOS hardening structures through 3-D TCAD simulations.The results show that this scheme presents about 35% improvements over the unhardened scheme for mitigating the SET pulse,and its upgrade,the 2-fringe scheme,takes on even more than 50% improvements over the unhardened one.This makes significant sense for the semi-conductor device reliability. | HUANG PengCheng CHEN ShuMing CHEN JianJun LIU BiWei | 2013 | Science China(Technological Sciences)2013，56，2： | 5 |
| 2 | A novel layout for single event upset mitigation in advanced CMOS SRAM cells显示文摘A novel layout has been proposed to reduce the single event upset(SEU) vulnerability of SRAM cells.Extensive 3-D technology computer-aided design(TCAD) simulation analyses show that the proposed layout can recover the upset-state much easier than conventional layout for larger space of PMOS transistors.For the angle incidence,the proposed layout is immune from ion hit in two plans,and is more robust against SEU in other two plans than the conventional one.The ability of anti-SEU is enhanced by at least 33% while the area cost reduced by 47%.Consequently,the layout strategy proposed can gain both reliability and area cost benefit simultaneously. | QIN JunRui LI DaWei CHEN ShuMing | 2013 | Science China(Technological Sciences)2013，56，1： | 4 |
| 3 | 25nm鱼鳍型场效应晶体管中单粒子瞬态的工艺参数相关性显示文摘基于TCAD(Technology Computer-Aided Design)3-D模拟,研究了25 nm鱼鳍型场效应晶体管(Fin Field Effect Transistor,FinFET)中单粒子瞬态效应的工艺参数相关性。研究表明一些重要工艺参数的起伏会对电荷收集产生显著影响,从而影响到电路中传播的SET(Single Event Transient)脉冲宽度。对于最佳工艺拐角,离子轰击后收集的电荷量可以降低约38%,而在最坏工艺拐角下,收集的电荷量则会增加79%。这些结论对FinFET工艺下的SET减缓及抗辐射加固设计提供了一种新的思路。 | 李达维 秦军瑞 陈书明 | 2012 | 国防科技大学学报2012，34，5： | 3 |
| 4 | Analyzing and mitigating the internal single-event transient in radiation hardened flip-flops at circuit-level显示文摘Internal SET has become a great concern in normal radiation-hardened flip-flops with increases in frequency.We investigate the internal SET problem in the traditional hardened flip-flops in this article.We also propose a novel structure to eliminate the internal SET problem.Three-dimensional technology computer-aided design(TCAD)was adopted to verify the hardened performance of this proposed novel structure.Besides,the power and setup time were compared with the traditional hardened flip-flops. | LIANG Bin SONG RuiQiang | 2014 | Science China(Technological Sciences)2014，57，9： | 2 |
| 5 | N阱掺杂对PMOS管的SET效应影响研究显示文摘基于Synopsys公司的3D-TCAD器件仿真软件,在65nm体硅CMOS工艺下研究了场效应晶体管(FET)抗辐射性能与工艺参数的关系,分析了N阱掺杂对单管PMOS单粒子瞬态脉冲(SET)效应的影响。针对PMOS管SET电流的各组分进行了分析,讨论了粒子轰击后器件各端口电流的变化情况。研究结果表明,增大N阱掺杂浓度能有效降低衬底空穴收集量,提升N阱电势,抑制寄生双极放大效应,减少SET脉冲宽度。该研究结果对从工艺角度提升PMOS器件的抗辐射性能有指导意义。 | 赵强 徐骅 刘畅咏 韩波 彭春雨 王静 吴秀龙 | 2018 | 微电子学2018，48，4： | 1 |
| 6 | 阱接触面积对PMOS单粒子瞬态脉冲宽度的影响显示文摘使用TCAD模拟工具分析了纳米工艺下阱接触面积对PMOS SET脉冲宽度的影响。结果表明,纳米工艺下,当存在脉冲窄化效应时,增加阱接触面积会导致SET脉冲变宽,这与传统的通过增加阱接触面积可抑制SET脉冲的观点正好相反。同时,还分析了不同入射粒子LET值以及晶体管间距条件对该现象的作用趋势。 | 刘蓉容 池雅庆 何益百 窦强 | 2015 | 计算机工程与科学2015，37，6： | 0 |
| 7 | Modeling to predict the time evolution of negative bias temperature instability(NBTI) induced single event transient pulse broadening显示文摘An analytical model is proposed to calculate single event transient (SET) pulse width with bulk complementary metal oxide semiconductor (CMOS) technology based on the physics of semiconductor devices. Combining with the most prevalent negative bias temperature instability (NBTI) degradation model, a novel analytical model is developed to predict the time evolution of the NBTI induced SET broadening in the production, and NBTI experiments and three-dimensional numerical device simulations are used to verify the model. At the same time, an analytical model to predict the time evolution of the NBTI induced SET broadening in the propagation is also proposed, and NBTI experiments and the simulation program with integrated circuit emphasis (SPICE) are used to verify the proposed model. | CHEN ShuMing CHEN JianJun CHI YaQing LIU FanYu HE YiBai | 2012 | Science China(Technological Sciences)2012，55，4： | 0 |
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