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| 1 | Recent progresses of NMOS and CMOS logic functions based on two-dimensional semiconductors显示文摘Metal-oxide-semiconductor field effect transistors(MOSFET)based on two-dimensional(2D)semiconductors have attracted extensive attention owing to their excellent transport properties,atomically thin geometry,and tunable bandgaps.Besides improving the transistor performance of individual device,lots of efforts have been devoted to achieving 2D logic functions or integrated circuit towards practical application.In this review,we discussed the recent progresses of 2D-based logic circuit.We will first start with the different methods for realization of n-type metal-oxide-semiconductor(NMOS)-only(or p-type metal-oxide-semiconductor(PMOS)-only)logic circuit.Next,various device polarity control and complementary-metal-oxide-semiconductor(CMOS)approaches are summarized,including utilizing different 2D semiconductors with intrinsic complementary doping,charge transfer doping,contact engineering,and electrostatics doping.We will discuss the merits and drawbacks of each approach,and lastly conclude with a short perspective on the challenges and future developments of 2D logic circuit. | Lingan Kong Yang Chen Yuan Liu | 2021 | Nano Research2021，14，6： | 4 |
| 2 | Firstprinciples simulation:ideas,illustrations and the CASTEP code显示文摘 | Segall M D Lingan P J D Probert M J | | J Phys:Condens Matter0，20，： | 1 |
| 3 | Wheat cropping systems and technologies in China显示文摘 | Fahong Wang Zhonghu He Ken Sayre Shengdong Li Jisheng Si Bo Feng Lingan Kong | 2008 | Field Crops Research2008，，3： | 1 |
| 4 | CT of Primary Hyperaldosteronism (Conn's syndrome):the Value of Measuring the Adrenal Gland显示文摘 | Lingan PK Sohaib SA Vlahos I | 2003 | AJR2003，181，3： | 1 |
| 5 | Generation of squeezed state by parametric down conversion显示文摘 | Wu Lingan Kimble H J Hail J L | 1986 | Phys Rev Lett1986，57，： | 1 |
| 6 | Portable simultaneous multiple analyte wholeblood analyzer for point-of-care testing 显示文摘 | Schembri CT Ostoich V Lingane PJ | 1992 | Clin Chem1992，38，： | 1 |
| 7 | Coulometric titration with higher oxidations states of manganese显示文摘 | R G Selim J J Lingane | 1959 | Anal Chim Acta1959，，21： | 1 |
| 8 | Acquiredabnorm dlties of the biliary tract from chronic gallstone eisease显示文摘 | Dorrance HR Lingan MK | 1999 | JAm Coll sury1999，189，3： | 1 |
| 9 | Generation of squeezed states by parametric down conversion显示文摘 | LINGAN W KIMBLE H J HALL J L | 1986 | Physical Review Letters1986，57，20： | 1 |
| 10 | Ultimate dielectric scaling of 2D transistors via van der Waals metal integration显示文摘The two-dimensional transition metal dichalcogenides(TMDs)have attracted intense interest as an atomically thin semiconductor channel for the continued transistor scaling.However,with a dangling bond free surface,it has been a key challenge to reliably integrate high-quality gate dielectrics on TMDs.In particular,the atomic layer deposition of dielectrics on TMDs typically features highly non-uniform nucleation and produces a highly rough or porous dielectric film with rich pinholes that are prone to further damage during the gate integration process.Herein we report a van der Waals(vdW)integration route towards highly reliable gate metal integration on porous dielectrics.The physical lamination process employed by the vdW integration avoids the direct deposition of metal electrodes into porous dielectrics to ensure reliable gate integration and produce low gate leakage devices.The electrical measurements demonstrate the vdW integrated MoS_(2) top gate devices exhibit substantially reduced gate leakage current that is about 3-5 orders of magnitude smaller than that with deposited metal electrodes.Furthermore,we show the vdW integration process can be used to create high performance top-gated MoS_(2) transistors with ultrathin Al_(2)O_(3) dielectrics down to 1 nm,representing the ultimate dielectric scaling for TMDs transistors.This study demonstrates that vdW integration can enable highly reliable gate integration on relatively low quality dielectrics on TMDs,and opens an interesting pathway to high-performance top-gate transistors using dangling bond free two-dimensional(2D)semiconductors. | Weiqi Dang Bei Zhao Chang Liu Xiangdong Yang Lingan Kong Zheyi Lu Bo Li Jia Li Hongmei Zhang Wanying Li Shun Shi Ziyue Qin Lei Liao Xidong Duan Yuan Liu | 2022 | Nano Research2022，15，2： | 0 |
| 11 | Degenerate Parametric Down Conversion of Squeezed Light显示文摘The quantum fluctuations of the pump and signal waves are derived for degenerate parametric down conversion from a pump field initially in the squeezed state.It is found that,to the quadratic term,while the degree of squeezing of the pump wave decays gradually,that of the generated signal beam increases up to a maximum then decays. | Li Shiqun WU Lingan | 1991 | Chinese Physics Letters1991，8，5： | 0 |
| 12 | Low voltage and robust InSe memristor using van der Waals electrodes integration显示文摘Memristors have attracted tremendous interest in the fields of high-density memory and neuromorphic computing.However,despite the tremendous efforts that have been devoted over recent years,high operating voltage,poor stability,and large device variability remain key limitations for its practical application and can be partially attributed to the un-optimized interfaces between electrodes and the channel material.We demonstrate,for the first time,a van der Waals(vdW)memristor by physically sandwiching pre-fabricated metal electrodes on both sides of the two-dimensional channel material.The atomically flat bottom electrode ensures intimate contact between the channel and electrode(hence low operation voltage),and the vdW integration of the top electrode avoids the damage induced by aggressive fabrication processes(e.g.sputtering,lithography)directly applied to the channel material,improving device stability.Together,we demonstrate memristor arrays with a high integration density of 10^(10)cm^(−2),high stability,and the lowest set/reset voltage of 0.12 V/0.04 V,which is a record low value for all 2D-based memristors,as far as we know.Furthermore,detailed characterizations are conducted to confirm that the improved memristor behavior is the result of optimized metal/channel interfaces.Our study not only demonstrates robust and low voltage memristor,but also provides a general electrode integration approach for other memristors,such as oxide based memristors,that have previously been limited by non-ideal contact integration,high operation voltage and poor device stability. | Qianyuan Li Quanyang Tao Yang Chen Lingan Kong Zhiwen Shu Huigao Duan Lei Liao Yuan Liu | 2021 | International Journal of Extreme Manufacturing2021，3，4： | 0 |
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